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ltc3520 1 3520fa v in (v) 2.2 efficiency (%) 3.7 3520 ta01b 2.7 3.2 4.2 4.7 5.2 70 75 80 85 90 95 100 buck-boost i out = 150ma buck i out = 250ma typical application features applications description synchronous 1a buck-boost and 600ma buck converters the ltc ? 3520 combines 1a buck-boost and 600ma synchronous buck dc/dc converters in a tiny 4mm 4mm package. a programmable switching frequency allows the ef? ciency to be optimized while minimizing the solution footprint. both converters feature soft-start and current limit protection. the uncommitted gain block can be con? gured as an ldo or utilized as a battery-good comparator. the buck converter is current mode controlled with internal synchronous recti? cation to improve ef? ciency. pin-select- able burst mode operation can be enabled to improve light load ef? ciency, or the buck converter can be operated in low noise pwm mode for sensitive applications. the buck-boost converter provides continuous conduc- tion operation to maximize ef? ciency and minimize noise. at light loads, use of burst mode operation will improve ef? ciency. the ltc3520 provides a <1a shutdown mode and over- temperature shutdown on both converters. the ltc3520 is available in a low pro? le (0.75mm) 24-lead 4mm 4mm qfn package. 3.3v at 500ma, 1.8v at 600ma and 1.5v at 200ma converter n dual high ef? ciency dc/dc converters: buck-boost (v out : 2.2v to 5.25v, i out = 1a at v out = 3.3v, v in 3v) buck (v out : 0.8v to v in , i out = 600ma) n 2.2v to 5.5v input voltage range n pin-selectable burst mode ? operation n uncommitted gain block for ldo controller, battery good indication or sequencing n programmable 100khz to 2mhz switching frequency n 55a total quiescent current for both converters in burst mode operation n thermal and overcurrent protection n <1a quiescent current in shutdown n 24-lead 4mm 4mm qfn package n portable media players n digital cameras n handheld pcs, pdas n gps receivers 3520 ta01 sw1a sw1b v out1 a out a in v out2 v c1 fb1 ss1 sv in pv in3 pv in2 pv in1 pgnd2 sgnd pgnd1 sw2 fb2 ss2 r t pwm1 pwm2 sd3 sd2 sd1 47f 4.7f 1m 309k 15k 470pf 10k 56pf ltc3520 v out1 3.3v 500ma 1a for v in 3v v out2 1.8v 600ma v in 2.2v to 5.5v v out 1.5v 200ma 10f 0.01 f 0.01 f 54.9k pwm burst 100k 110k 33pf 255k 27pf 200k 22f 4.7h 4.7h on off ef? ciency vs v in l , lt, ltc, ltm, linear technology, the linear logo and burst mode are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. protected by u.s. patents, including 5481178, 6166527, 6304066, 6404251, 6580258.
ltc3520 2 3520fa lead free finish tape and reel part marking* package description temperature range ltc3520euf#pbf ltc3520euf#trpbf 3520 24-lead (4mm 4mm) plastic qfn C40c to 85c ltc3520iuf#pbf ltc3520iuf#trpbf 3520 24-lead (4mm 4mm) plastic qfn C40c to 125c consult ltc marketing for parts speci? ed with wider operating temperature ranges. *the temperature grade is identi? ed by a label on the shipping container. consult ltc marketing for information on non-standard lead based ? nish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel speci? cations, go to: http://www.linear.com/tapeandreel/ pin configuration electrical characteristics absolute maximum ratings pv in1 , pv in2 , pv in3 , sv in voltage ................ C0.3v to 6v sw1a, sw1b, sw2 voltage dc ............................................................ C0.3v to 6v pulsed <100ns ............................................ C1v to 7v voltage, all other pins ................................. C0.3v to 6v operating junction temperature range (note 2) .................................................. C40c to 125c maximum junction temperature (note 5) ............ 125c storage temperature range .................. C65c to 150c (note 1) parameter conditions min typ max units input voltage l 2.2 5.5 v quiescent current in shutdown v sd1 = v sd2 = v sd3 = 0v ltc3520e ltc3520i l l 0.01 0.5 1 4 a a undervoltage lockout sv in rising 2 2.2 v burst mode quiescent current, both converters v fb1 = v fb2 = 0.88v, v sd3 = 0v 55 a oscillator frequency r t = 54.9k l 0.8 1 1.2 mhz buck converter pmos switch resistance 0.32 nmos switch resistance 0.18 nmos switch leakage v sw2 = 5v, s vin = p vin1 = p vin2 = p vin3 = 5v 0.1 5 a pmos switch leakage v sw2 = 0v, s vin = p vin1 = p vin2 = p vin3 = 5v 0.1 10 a 24 23 22 21 20 19 7 8 9 top view uf package 24-lead (4mm s 4mm) plastic qfn 10 25 11 12 6 5 4 3 2 1 13 14 15 16 17 18 sv in a out a in r t pwm1 sd1 pv in3 pv in1 sw1a pgnd1 sw1b v out1 sd2 sd3 pv in2 sw2 pgnd2 pwm2 fb1 ss1 sgnd v c1 fb2 ss2 t jmax = 125c, ja = 37c/w exposed pad (pin 25) is gnd, must be soldered to pcb the l denotes the speci? cations which apply over the full operating junction temperature range, otherwise speci? cations are at t a = 25c, s vin = p vin1 = p vin2 = p vin3 = 3.6v, v out1 = 3.3v, r t = 54.9k, unless otherwise noted. order information
ltc3520 3 3520fa parameter conditions min typ max units feedback voltage (fb2 pin) (note 4) l 0.771 0.790 0.809 v feedback input current (fb2 pin) 150 na pmos current limit (note 3) l 0.8 1.25 a maximum duty cycle v fb2 = 0.72v l 100 % minimum duty cycle v fb2 = 0.88v l 0% soft-start charging current 6a sd2 input high voltage 1.4 v sd2 input low voltage 0.4 v sd2 input current 0.01 1 a buck-boost converter output voltage l 2.2 5.25 v pmos switch resistance 0.20 nmos switch resistance 0.15 nmos switch leakage v sw1a = v sw1b = 5v, s vin = p vin1 = p vin2 = p vin3 = 5v 0.1 5 a pmos switch leakage v sw1a = v sw1b = 0v, s vin = p vin1 = p vin2 = p vin3 = 5v 0.1 10 a feedback voltage (fb1 pin) l 0.766 0.782 0.798 v feedback input current (fb1 pin) 150 na forward current limit (note 3) ltc3520e ltc3520i l l 1.4 1.25 2 1.85 a a reverse current limit (note 3) 560 ma burst mode operation current limit (note 3) 325 ma error ampli? er gain 80 db error ampli? er sink current 500 a error ampli? er source current 14 a maximum duty cycle boost (% switch c is on) buck (% switch a is on) l 70 100 80 % % minimum duty cycle l 0% soft-start charging current 6a sd1 , pwm1 input high voltage 1.4 v sd1 , pwm1 input low voltage 0.4 v sd1 , pwm1 input current 0.01 1 a gain block quiescent current v ain = 0.88v, v sd1 = v sd2 = 0v 45 a a in pin threshold voltage l 0.770 0.786 0.802 v a in pin input bias current 150 na a out sink current v ain = 0.72v, v aout = 1.8v 17 ma a out source current v ain = 0.88v, v aout = 1.8v 18 a a out pin voltage v ain = 0.72v, i aout = 1ma 25 150 mv open loop gain 80 db electrical characteristics the l denotes the speci? cations which apply over the full operating junction temperature range, otherwise speci? cations are at t a = 25c, s vin = p vin1 = p vin2 = p vin3 = 3.6v, v out1 = 3.3v, r t = 54.9k, unless otherwise noted.
ltc3520 4 3520fa load current (ma) 1 0 efficiency (%) power loss (mw) 10 30 40 50 100 70 10 100 20 80 90 60 0 50 150 200 250 300 100 1000 3520 g01 v in = 4.2v v in = 2.7v pwm mode burst mode operation burst mode operation power loss l = coilcraft mss6132-4.7h buck-boost ef? ciency lithium-ion to 3.3v buck ef? ciency lithium-ion to 2.7v parameter conditions min typ max units propagation delay a out falling 11 s sd3 input high voltage 1.4 v sd3 input low voltage 0.4 v sd3 input current 0.01 1 a electrical characteristics the l denotes the speci? cations which apply over the full operating junction temperature range, otherwise speci? cations are at t a = 25c, v in = 3.6v, v out1 = 3.3v, v out2 = 1.8v, r t = 54.9k, unless otherwise noted. note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the ltc3520e is guaranteed to meet performance speci? cations from 0c to 85c. speci? cations over the C40c to 85c operating junction temperature range are assured by design, characterization and correlation with statistical process controls. the ltc3520i is guaranteed to meet performance speci? cations over the full C40c to 125c operating junction temperature range. note 3: current measurements are performed when the ltc3520 is not switching. the current limit values in operation will be somewhat higher due to the propagation delay of the comparators. note 4: the ltc3520 is tested in a proprietary non-switching test mode that internally connects the fb2 pin to the output of the buck converter error ampli? er. note 5: this ic includes overtemperature protection that is intended to protect the device during momentary overload conditions. junction temperature will exceed 125c when overtemperature protection is active. continuous operation above the speci? ed maximum operating junction temperature may impair device reliability. load current (ma) 1 0 efficiency (%) power loss (mw) 10 30 40 50 100 70 10 100 20 80 90 60 0 100 300 400 500 700 200 800 600 1000 3520 g02 pwm mode burst mode operation burst mode operation power loss l = sumida cdrh3d16np-4r7n typical performance characteristics (t a = 25c, unless otherwise speci? ed)
ltc3520 5 3520fa typical performance characteristics buck ef? ciency lithium-ion to 1.8v switching frequency vs r t ldo load transient response buck-boost load transient response buck load transient response (pwm mode) buck load transient response (burst mode operation) load current (ma) 1 0 efficiency (%) power loss (mw) 10 30 40 50 100 70 10 100 20 80 90 60 0 100 300 400 500 800 700 200 600 1000 3520 g03 v in = 4.2v v in = 3v pwm mode burst mode operation burst mode operation power loss l = sumida cdrh3d16np-4r7n r burst = 249k r t (k) 10 100 switching frequency (khz) 1000 10000 100 1000 3520 g04 50s/div ldo v out 100mv/div load current 100ma/div (20ma to 210ma step) 3520 g05 v in = 3.6v v out = 1.5v c out = 4.7f ldo input voltage = 1.8v 200s/div v out v in = 5v 200mv/div v out v in = 2.2v 500mv/div load current 500ma/div c out = 47f l = 4.7h v in = 3.3v 3520 g06 100s/div buck v out 100mv/div load current 500ma/div (50ma to 500ma step) 3520 g07 v in = 3.6v v out = 1.8v c out = 10f 100s/div buck v out 100mv/div load current 200ma/div (5ma to 300ma step) 3520 g08 v in = 3.6v v out = 1.8v c out = 22f r burst = 249k
ltc3520 6 3520fa v in (v) 2.2 output current (ma) 3.7 3520 g09b 2.7 3.2 4.2 4.7 5.2 0 10 15 20 25 30 35 40 45 5 l = 3.3h r burst = 249k r burst = 301k temperature (c) C40 change from t = 25c (%) 20 3520 g14 C20 0 40 60 80 C1.0 C0.6 C0.4 C0.2 0 0.2 0.4 0.6 0.8 1.0 C0.8 temperature (c) C40 change from t = 25c (%) 20 3520 g13 C20 0 40 60 80 C1.0 C0.6 C0.4 C0.2 0 0.2 0.4 0.6 0.8 1.0 C0.8 temperature (c) C45 r ds(on) (m) 350 15 3520 g11 200 100 C25 C5 35 50 0 400 300 250 150 55 75 pmos nmos temperature (c) C45 switching frequency, change from 25c (%) 1.5 15 3520 g12 0 C1.0 C25 C5 35 C1.5 C2.0 2.0 1.0 0.5 C0.5 55 75 typical performance characteristics buck burst mode threshold v out = 1.2v buck r ds(on) switching frequency buck-boost feedback voltage buck feedback voltage no load input current v in (v) 2.2 0 no load current (a) 10 30 40 50 100 70 3.2 4.2 4.7 20 80 90 60 2.7 3.7 5.2 3520 g15 buck and buck-boost converters enabled, burst mode operation v in (v) 2.2 output current (ma) 3.7 3520 g09 2.7 3.2 4.2 4.7 5.2 0 5 15 25 10 20 30 35 40 45 l = 4.7h r burst = 249k r burst = 274k r burst = 301k temperature (c) C45 r ds(on) (m) 250 15 3520 g10 200 100 C25 C5 35 50 0 150 55 75 pmos (switches a and d) nmos (switches b and c) buck burst mode threshold v out = 1.8v buck-boost r ds(on) buck output voltage vs load current load current (ma) C3 change in voltage from 100ma load (%) 3 2 1 C2 C1 0 200 400 600 3520 g23 0 t a = C40c, 25c t a = 85c t a = 125c
ltc3520 7 3520fa v in (v) 2.2 output current (ma) 3.7 3520 g17 2.7 3.2 4.2 4.7 5.2 0 20 40 60 80 100 120 140 v out = 3.3v v out = 5v v in (v) 2.2 output current (ma) 3.7 3520 g16 2.7 3.2 4.2 4.7 5.2 0 400 600 800 1000 1200 1400 1600 1800 200 v out = 5v v out = 3.3v buck-boost maximum output current, pwm mode buck-boost maximum output current, burst mode operation buck-boost pwm mode ef? ciency vs frequency buck ef? ciency vs frequency buck-boost burst mode operation buck burst mode operation typical performance characteristics 85 100 75 95 80 70 90 switching frequency (mhz) 0.4 efficiency (%) 0.8 1.2 1.6 0.6 1 2 1.4 1.8 3520 g19 v in = 2.5v v out = 1.8v i load = 100ma l = 4.7h sumida cdrh3d16np l = 2.2h sumida cdrh3d16np l = 8.2h coilcraft mss6132 switching frequency (mhz) 0.4 efficiency (%) 85 100 0.8 1.2 1.6 75 95 80 70 90 0.6 1 2 1.4 1.8 3520 g18 l = 8.2h coilcraft mss6132 v in = 3.6v v out = 3.3v i load = 200ma l = 4.7h coilcraft mss7341 l = 2.2h coilcraft 1812ps 20s/div v out 50mv/div inductor current 200ma/div 3520 g21 c out = 22f l = 4.7h i load = 25ma v in = 3.6v 10s/div buck v out 50mv/div inductor current 200ma/div 3520 g22 v in = 3.6v v out = 1.8v i load = 10ma r burst = 249k c out = 10f ldo output voltage vs load current buck-boost output voltage vs load current load current (ma) 0 C0.5 change in voltage from zero load (%) 0.5 0.4 0.3 0.2 0.1 C0.4 C0.3 C0.2 C0.1 0 400 200 600 800 1000 1200 3520 g24 t a = C40c t a = 25c t a = 125c load current (ma) 0 C0.20 change in voltage from zero load (%) 0.20 0.15 0.10 0.05 C0.15 C0.10 C0.05 0 100 200 300 3520 g25 t a = C40c t a = 25c t a = 125c
ltc3520 8 3520fa pin functions sv in (pin 1): small signal power supply connection. this pin is used to power the internal circuitry of the ltc3520. this pin should be bypassed using a 0.1f or larger ceramic capacitor placed as close as possible to the pin with a short return path to ground. pins pv in1 , pv in2 , pv in3 , and sv in must be connected together in the application circuit. a out (pin 2): uncommitted ampli? er output. this pin should be connected to the base of an external pnp transistor for use as an ldo regulator. if used as a battery-good indicator or for supply sequencing, this pin is the comparator output. a in (pin 3): non-inverting input to the uncommitted ampli? er. in ldo applications, this pin is connected to the ldo feedback voltage. r t (pin 4): programs the frequency of the internal oscilla- tor. this pin must be tied to ground via an external resistor. the value of the resistor controls the oscillator frequency. for details on choosing the value of this resistor see the applications information section of this datasheet. pwm1 (pin 5): logic input used to choose between burst and pwm mode for the buck-boost converter. this pin cannot be left ? oating. pwm1 = low: the buck-boost converter will operate in variable frequency mode to improve ef? ciency at light loads. in this mode, the ltc3520 can only supply a reduced load current (typically 50ma). pwm1 = high: the buck-boost converter will remain in low noise, ? xed frequency pwm mode at all load currents. sd1 (pin 6): buck-boost active-low shutdown pin. forc- ing this pin above 1.4v enables the buck-boost converter. forcing this pin below 0.4v disables the buck-boost converter. this pin cannot be left ? oating. sd2 (pin 7): buck active-low shutdown pin. forcing this pin above 1.4v enables the buck converter. forcing this pin below 0.4v disables the buck converter. this pin cannot be left ? oating. sd3 (pin 8): uncommitted ampli? er active-low shutdown pin. forcing this pin above 1.4v enables the uncommitted ampli? er. forcing this pin below 0.4v disables the uncom- mitted ampli? er. this pin cannot be left ? oating. pv in2 (pin 9): high current power supply connection used to supply the buck converter pmos power device. this pin should be bypassed by a 22f or larger ceramic capacitor. the bypass capacitor should be placed as close to the pin as possible and should have a short return path to ground. pins pv in1 , pv in2 , pv in3 , and sv in must be connected together in the application circuit. sw2 (pin 10): buck converter switch node. this pin must be connected to one side of the buck inductor. pgnd2 (pin 11): high current ground connection for the buck converter n-channel mosfet power device. the pcb trace connecting this pin to ground should be made as short and wide as possible. pwm2 (pin 12): burst/pwm mode control pin for the buck converter. this pin can be used in the following ways: pwm2 forced high: with pwm2 forced high, the buck converter will be forced into low noise ? xed frequency operation. the buck converter will remain in this mode unless the load current is low enough that the minimum on-time is reached at which point the converter will begin pulse-skipping to maintain regulation. pwm2 connected to ground via resistor: pwm2 can be connected to ground through a resistor to control the load current at which burst mode operation is entered and exited. larger resistor values will cause the buck converter to enter burst mode operation at lower load currents and will result in lower output voltage ripple in burst mode operation. smaller resistor values will cause burst mode operation to be entered at higher load currents and the burst mode ripple will be larger. pwm2 forced low: with pwm2 forced to ground, the buck converter will operate in burst mode operation for all but the highest load currents. generally, this mode of operation is utilized to force the buck converter into burst mode operation when it is known that the load current will be relatively low (under 75ma) or in applications that are not sensitive to output voltage ripple.
ltc3520 9 3520fa pin functions ss2 (pin 13): buck converter soft-start pin. this pin must be connected to a soft-start capacitor. the value of the capacitor determines the duration of the soft-start period. for information on choosing the value of this capacitor, see the applications information section of this datasheet. fb2 (pin 14): feedback voltage for the buck converter. this pin is derived from a resistor divider on the buck output voltage. the buck output voltage is given by the following equation where r1 is a resistor between fb2 and ground and r2 is a resistor between fb2 and the buck output voltage: vv r r out =+ ? ? ? ? ? ? 0 790 1 2 1 . v c1 (pin 15): buck-boost error ampli? er output. a fre- quency compensation network is connected to fb1 to compensate the loop. during burst mode operation, v c1 is driven internally by a clamp circuit. sgnd (pin 16): small signal ground. this pin is used as a ground reference for the internal circuitry of the ltc3520. ss1 (pin 17): buck-boost converter soft-start pin. this pin must be connected to a soft-start capacitor. the value of the capacitor determines the duration of the soft-start period. for information on choosing the value of this capacitor, see the applications information section of this datasheet. fb1 (pin 18): feedback voltage for the buck-boost con- verter. this pin is derived from a resistor divider on the buck-boost output voltage. the buck-boost output voltage is given by the following equation where r1 is a resistor between fb1 and ground and r2 is a resistor between fb1 and the buck-boost output voltage: vv r r out =+ ? ? ? ? ? ? 0 782 1 2 1 . v out1 (pin 19): buck-boost output voltage node. this pin should be connected to a low esr buck-boost output capacitor. the capacitor should be placed as close to the ic as possible and should have a short return path to ground. sw1b (pin 20): buck-boost switch node. this pin must be connected to one side of the buck-boost inductor. pgnd1 (pin 21): high current ground connection for the buck-boost nmos power devices. the pcb trace connecting this pin to ground should be made as short and wide as possible. sw1a (pin 22): buck-boost switch node. this pin must be connected to one side of the buck-boost inductor. pv in1 (pin 23), pv in3 (pin 24): high current power sup- ply connections used to power the buck-boost converter power switch a. these pins should be connected together and bypassed by a 22f or larger ceramic capacitor. the bypass capacitor should be placed as close to the pin as possible and should have a short return path to ground. pins pv in1 , pv in2 , pv in3 , and sv in must be connected together in the application circuit. exposed pad (pin 25): ground. the exposed pad must be electrically connected to ground and soldered to the pcb. pins pgnd1, pgnd2, sgnd, and the exposed pad must be connected together in the application circuit.
ltc3520 10 3520fa block diagram r t + C + C + C + C + C + + C + C + C + + C + C 14 13 12 7 16 21 2 3 8 6 5 23 24 22 20 19 18 17 15 4 9 10 11 1 + buck- boost pwm logic bandgap reference thermal shutdown internal v cc slope compensation 3520 f02 + C buck pwm logic gate drivers ad b pgnd1 pgnd1 c 0.56a osc fb1 ss1 pwm1 2a 3a 0.786v 0.782v 0.790v disable 1.25a sd1 sd3 a in a out sv in * 5 a 5 a fb2 *pins sv in , pv in1 , pv in2 and pv in3 must be connected together in the application. gm ss2 v c1 pv in2 * sw2 pgnd2 0a sd2 pwm2 pgnd1 sgnd pv in1 *pv in3 * sw1a sw1b v out1 gm
ltc3520 11 3520fa operation the ltc3520 combines a synchronous buck dc/dc converter and a four-switch buck-boost dc/dc converter in a single 4mm 4mm qfn package. the buck-boost converter utilizes a proprietary switching algorithm which allows its output voltage to be regulated above, below, or equal to the input voltage. the buck converter provides a high ef? ciency lower voltage output and supports 100% duty cycle operation to extend battery life. in burst mode operation, the total quiescent current for both converters is reduced to 55a (typical). both converters operate synchronously from a common internal oscillator whose frequency is programmed via an external resistor. in ad- dition, the ltc3520 contains an uncommitted gain block which can be con? gured as a comparator for low battery detection or as a power-good indicator. alternatively, the gain block can be utilized in conjunction with an external pnp to create an ldo, thereby allowing the ltc3520 to generate a third low noise output voltage. buck converter operation pwm mode operation when the pwm2 pin is held high, the ltc3520 buck converter uses a constant-frequency, current mode control architec- ture. both the main (p-channel mosfet) and synchronous recti? er (n-channel mosfet) switches are internal. at the start of each oscillator cycle, the p-channel switch is turned on and remains on until the current waveform with superimposed slope compensation ramp exceeds the error ampli? er output. at this point, the synchronous recti? er is turned on and remains on until the inductor current falls to zero or a new switching cycle is initiated. as a result, the buck converter operates with discontinuous inductor cur- rent at light loads which improves ef? ciency. at extremely light loads, the minimum on-time of the main switch will be reached and the buck converter will begin turning off for multiple cycles in order to maintain regulation. burst mode operation burst mode operation is enabled by either connecting pwm2 to ground through a resistor, r burst , or by shorting pwm2 to ground. the buck converter will automatically transition between pwm mode at high load current and burst mode operation at light currents. typical curves for the burst mode entry threshold are provided in the typical performance characteristics section of this datasheet. under dropout and near dropout conditions, burst mode operation will not be entered. the value of r burst controls the load current at which burst mode operation will be entered. larger resistor values will cause burst mode operation to be entered at lighter load currents. however, if the value of r burst is too large, then the buck converter will not enter burst mode operation at any current, especially when operating with v in close to the buck output voltage. conversely, if r burst is too small, the ripple in burst mode operation may become objectionable, especially at high input volt- ages. for most applications, choosing r burst = 301k represents a reasonable compromise. the output voltage ripple in burst mode operation is de- pendent upon the value of r burst , the input voltage, the output voltage, the inductor value and the output capaci- tor. the burst mode operation output voltage ripple can be reduced by increasing the size of the output capacitor, increasing the value of the inductor or increasing the value of r burst . low dropout operation as the input voltage decreases to a value approaching the output regulation voltage, the duty cycle increases toward the maximum on-time. further reduction of the supply voltage will force the power p-channel mosfet switch to remain on for more than one cycle until 100% duty cycle operation is reached and the power switch remains on continuously. in this dropout state, the output voltage will be determined by the input voltage less the resistive voltage drop across the main switch and series resistance of the inductor. slope compensation current mode control requires the use of slope compensa- tion to prevent subharmonic oscillations in the inductor current waveform at high duty cycle operation. this is ac- complished internally on the ltc3520 through the addition of a compensating ramp to the current sense signal. in some current mode ics, current limiting is performed by clamping the error ampli? er voltage to a ? xed maximum.
ltc3520 12 3520fa this leads to a reduced output current capability at large step-down ratios. in contrast, the ltc3520 performs cur- rent limiting prior to the addition of the slope compensation ramp and therefore achieves a peak inductor current limit that is independent of duty cycle. soft-start the buck converter incorporates a voltage mode soft-start circuit which is adjustable via the value of an external soft-start capacitor, c ss . the typical soft-start duration is given by the following equation: t ss (ms) = 0.15c ss (nf) the buck converter remains in regulation during soft-start and will therefore respond to output load transients which occur during this time. in addition, the output voltage rise- time has minimal dependency on the size of the output capacitor or load current. error ampli? er and compensation the lt3520 buck converter utilizes an internal trans- conductance error ampli? er. compensation of the feed- back loop is performed internally to reduce the size of the application circuit and simplify the design process. the compensation network has been designed to allow use of a wide range of output capacitors while simultaneously ensuring a rapid response to load transients. buck-boost converter operation pwm mode operation when the pwm pin is held high, the ltc3520 buck-boost converter operates in a constant-frequency pwm mode us- ing voltage mode control. a proprietary switching algorithm allows the converter to switch between buck, buck-boost, and boost modes without discontinuity in inductor cur- rent or loop characteristics. the switch topology for the buck-boost converter is shown in figure 1. when the input voltage is signi? cantly greater than the output voltage, the buck-boost converter operates in buck mode. switch d turns on continuously and switch c remains off. switches a and b are pulse width modulated to produce the required duty cycle to support the output regulation voltage. as the input voltage decreases, switch a remains on for a larger portion of the switching cycle. when the duty cycle reaches approximately 85%, the switch pair ac begins turning on for a small fraction of the switching period. as the input voltage decreases further, the ac switch pair remains on for longer durations and the duration of the bd phase decreases proportionally. as the input voltage drops below the output voltage, the ac phase will eventually increase to the point that there is no longer any bd phase. at this point, switch a remains on continuously while switch pair cd is pulse width modu- lated to obtain the desired output voltage. in this case, the converter is operating solely in boost mode. this switching algorithm provides a seamless transition between operating modes and eliminates discontinuities in average inductor current, inductor current ripple, and loop transfer function throughout all three operational modes. these advantages result in increased ef? ciency and stability in comparison to the traditional four-switch buck-boost converter. figure 1. buck-boost switch topology operation ltc3520 a b l pgnd1 sw1a pv in1 v out1 sw1b 3520 f01 d pgnd1 c
ltc3520 13 3520fa error ampli? er the error ampli? er operates in voltage mode. appropriate loop compensation components must be utilized around the ampli? er (between the fb1 and v c1 pins) in order to ensure stable operation. for improved bandwidth, an additional rc feedforward network can be placed across the upper feedback divider resistor. current limit operation the buck-boost converter has two current limit circuits. the primary current limit is an average current limit circuit which injects an amount of current into the feedback node which is proportional to the extent that the switch a cur- rent exceeds the current limit value. due to the high gain of this loop, the injected current forces the error ampli? er output to decrease until the average current through switch a decreases approximately to the current limit value. the average current limit utilizes the error ampli? er in an active state and thereby provides a smooth recovery with little overshoot once the current limit fault condition is removed. since the current limit is based on the average current through switch a, the peak inductor current in current limit will have a dependency on the duty cycle (i.e., on the input and output voltages in the overcurrent condition). the speed of the average current limit circuit is limited by the dynamics of the error ampli? er. on a hard output short, it would be possible for the inductor current to increase substantially beyond current limit before the average cur- rent limit circuit would react. for this reason, there is a second current limit circuit which turns off switch a if the current ever exceeds approximately 150% of the average current limit value. this provides additional protection in the case of an instantaneous hard output short. reverse current limit the reverse current comparator on switch d monitors the inductor current entering the v out1 pin. if this current exceeds 560ma (typical) switch d is turned off for the remainder of the switching cycle. burst mode operation with the pwm1 pin held low, the buck-boost converter operates utilizing a variable frequency switching algorithm designed to improve ef? ciency at light loads and reduce the standby current at zero load. in burst mode operation, the inductor is charged with ? xed peak amplitude current pulses. these current pulses are repeated as often as necessary to maintain the output regulation voltage. the typical output current which can be supplied in burst mode operation is dependent upon the input and output voltage as given by the following formula: i v vv a out max burst in in out (), .? = + 013 in burst mode operation, the error ampli? er is not used but is instead placed in a low current standby mode to reduce supply current and improve light load ef? ciency. soft-start the buck-boost converter incorporates a voltage mode soft-start circuit which is adjustable via the value of an external soft-start capacitor, c ss . the typical soft-start duration is given by the following equation: t ss (ms) = 0.15c ss (nf) the converter remains in regulation during soft-start and will therefore respond to output load transients that occur during this time. in addition, the output voltage rise time has minimal dependency on the size of the output capaci- tor or load. during soft-start, the buck-boost converter is forced into pwm operation regardless of the state of the pwm1 pin. transition from burst to pwm operation in burst mode operation, the compensation network is not used and the v c1 pin is disconnected from the error ampli? er. during long periods of burst mode operation, leakage currents in the external components or on the pcb could cause the compensation capacitor to charge or discharge resulting in a large output transient when returning to the ? xed frequency mode of operation. to prevent this from happening, the ltc3520 employs an active clamp circuit that holds the voltage on the v c1 pin to the optimal level during burst mode operation. this minimizes any output transient when returning to ? xed frequency operation. operation
ltc3520 14 3520fa common functions oscillator the buck-boost and buck converters operate from a com- mon internal oscillator. the switching frequency for both converters is set by the value of an external resistor, r t , located between the r t pin and ground according to the following equation: fkhz rk t () , () = 54 000 gain block the ltc3520 contains a gain block (pins a in and a out ) that can be used as a low battery indicator or power-good comparator for either the buck or buck-boost output volt- age. typical circuits for these applications are shown in figure 2. a small-valued capacitor can be added from a out to gnd to provide ? ltering and prevent glitching during slow transitions through the threshold region. the gain block is not disabled by the undervoltage lockout. this allows the uncommitted ampli? er to be utilized as a low battery indicator down to a supply voltage of 1.6v typically. the a out pin is not an open-drain output. rather, it is a push-pull output that can both sink and source current. the uncommitted ampli? er is internally powered by the higher of either the sv in or v out1 voltages. this restricts the maximum voltage on the a out pin to either the input supply voltage or the buck-boost output voltage, which- ever is larger. alternatively, the gain block can be utilized as an ldo with the addition of an external pnp as shown in figure 3. the ldo is convenient for applications requiring a third output (possibly a low current 2.5v or a quiet 3v supply). an external pmos can be used in place of the pnp , but a much larger output capacitor is required to ensure stability at light load. the gain block has an independent shutdown pin ( sd3 ) and should be disabled when not in use to reduce quiescent current. thermal shutdown if the die temperature exceeds 150oc both converters will be disabled. all power devices will be turned off and all switch nodes will be high impedance. the soft-start circuits for both converters are reset during thermal shutdown to provide a smooth recovery once the over- temperature condition is eliminated. both converters will restart (if enabled) when the die temperature drops to approximately 140oc. undervoltage lockout if the supply voltage decreases below 2v (typical) then both converters will be disabled and all power devices will be turned off. the soft-start circuits for both converters are reset during undervoltage lockout to provide a smooth restart once the input voltage rises above the undervoltage lockout threshold. figure 2. gain block used as a comparator figure 3. gain block con? gured as an ldo operation v out 2.5v 200ma 3.3v 33pf 169k 76.8k 4.7 f 3520 f05 ltc3520 a in a out v out pgood 750k 402k 3520 f02 ltc3520 a in a out a in a out v bat lbo 2.49m 330pf 806k ltc3520
ltc3520 15 3520fa the basic ltc3520 application circuit is shown as the typical application on the front page of this datasheet. the external component selection is determined by the desired output voltages, output currents, and ripple volt- age requirements of each particular application. however, basic guidelines and considerations for the design process are provided in this section. operating frequency selection the operating frequency choice is a tradeoff between ef- ? ciency and application area. higher operating frequencies allow the use of smaller inductors and smaller input and output capacitors, thereby reducing application area. how- ever, higher operating frequencies also increase switching losses and therefore decrease ef? ciency. typical ef? ciency versus switching frequency curves for both converters are given in the typical performance characteristics section of this datasheet. buck inductor selection the choice of buck inductor value in? uences both the ef- ? ciency and the magnitude of the output voltage ripple. larger inductance values will reduce inductor current ripple and will therefore lead to lower output voltage ripple. for a ? xed dc resistance, a larger value inductor will yield higher ef? ciency by lowering the peak current and reducing core losses. however, a larger inductor within the same family will generally have a greater series resistance, thereby offsetting this ef? ciency advantage. given a desired peak to peak current ripple, i l , the required inductor can be calculated via the following expression, where f represents the switching frequency in mhz: l fi v v v h l out out in =? ? ? ? ? ? ? 1 1 a reasonable choice for ripple current is i l = 240ma which represents 40% of the maximum 600ma load current. the dc current rating of the inductor should be at least equal to the maximum load current plus half the ripple current in order to prevent core saturation and loss of ef? ciency during operation. to optimize ef? ciency, an inductor with low series resistance should be utilized. applications information in particularly space restricted applications it may be advantageous to use a much smaller value inductor at the expense of larger ripple current. in such cases, the converter will operate in discontinuous conduction for a wider range of output loads and ef? ciency will be reduced. in addition, there is a minimum inductor value required to maintain stability of the current loop (given the ? xed internal slope compensation). speci? cally, if the buck converter is going to be utilized at duty cycles over 40%, the inductance value must be at least l min as given by the following equation: l min = 1.4 ? v out h table 1 depicts the minimum required inductance for several common output voltages. table 1. buck minimum inductance output voltage minimum inductance 0.8v 1.1h 1.2v 1.7h 2v 2.8h 2.7v 3.8h 3.3v 4.5h buck output capacitor selection a low esr output capacitor should be utilized at the buck output in order to minimize voltage ripple. multilayer ceramic capacitors are an excellent choice as they have low esr and are available in small footprints. in addi- tion to controlling the ripple magnitude, the value of the output capacitor also sets the loop crossover frequency and therefore can impact loop stability. there is both a minimum and maximum capacitance value required to ensure stability of the loop. if the output capacitance is too small, the loop crossover frequency will increase to the point where switching delay and the high frequency parasitic poles of the error ampli? er will degrade the phase margin. in addition, the wider bandwidth produced by a small output capacitor will make the loop more sus- ceptible to switching noise. at the other extreme, if the output capacitor is too large, the crossover frequency can decrease too far below the compensation zero and also lead to degraded phase margin. table 2 provides a guideline for the range of allowable values of low esr
ltc3520 16 3520fa output capacitors. larger value output capacitors can be accommodated provided they have suf? cient esr to stabilize the loop or by adding a feedforward capacitor in parallel with the upper feedback resistor. table 2. buck output capacitor range v out c min c max 0.8v 30f 100f 1.2v 15f 50f 1.8v 10f 30f 2.7v 7f 22f 3.3v 6f 20f buck input capacitor selection the pv in2 pin provides current to the buck converter pmos power switch. it is recommended that a low esr ceramic capacitor with a value of at least 22f be used to bypass this pin. the capacitor should be placed as close to the pin as possible and have a short return to ground. buck output voltage programming the buck converter output voltage is set by a resistive divider according to the following formula: vv r r out =+ ? ? ? ? ? ? 0 790 1 2 1 . the external divider is connected to the output as shown in figure 4. a reasonable compromise between noise immunity and quiescent current is provided by choosing r2 = 249k. the required value for r1 can then be solved via the formula above. it is recommended that a 27pf figure 4. setting the buck output voltage feedforward capacitor be placed in parallel with r2 in order to improve the transient response and reduce burst mode ripple. buck-boost output voltage programming the buck-boost output voltage is set by a resistive divider according to the following formula: vv r r out =+ ? ? ? ? ? ? 0 782 1 2 1 . the external divider is connected to the output as shown in figure 5. in addition to setting the output voltage, the value of r2 plays an integral role in compensation of the buck- boost control loop. for more details, see the closing the buck-boost feedback loop section of this datasheet. buck-boost inductor selection to achieve high ef? ciency, a low esr inductor should be utilized for the buck-boost converter. the inductor must have a saturation rating greater than the worst case average inductor current plus half the ripple current. the peak-to- peak inductor current ripple will be larger in buck and boost mode than in the buck-boost region. the peak-to-peak inductor current ripple for each mode can be calculated from the following formulas, where f is the frequency in mhz and l is the inductance in h: i f vvv v i lp pbuck l out in out in lp pbo ,, ,, () ? ? = ? 1 o ost l in out in out f vv v v = ? 1 () figure 5. setting the buck-boost output voltage applications information fb2 0.8v v out 5.25v r2 r1 3520 f04 gnd ltc3520 27pf fb1 2.2v v out 5.25v r2 r1 3520 f05 gnd ltc3520
ltc3520 17 3520fa in addition to affecting output current ripple, the size of the inductor can also affect the stability of the feedback loop. in boost mode, the converter transfer function has a right half plane zero at a frequency that is inversely proportional to the value of the inductor. as a result, a large inductor can move this zero to a frequency that is low enough to degrade the phase margin of the feedback loop. it is recommended that the inductor value be chosen less than 10h if the buck-boost converter is to be used in the boost region. buck-boost output capacitor selection a low esr output capacitor should be utilized at the buck- boost converter output in order to minimize output volt- age ripple. multilayer ceramic capacitors are an excellent choice as they have low esr and are available in small footprints. the capacitor should be chosen large enough to reduce the output voltage ripple to acceptable levels. neglecting the capacitor esr and esl, the peak-to-peak output voltage ripple can be calculated by the following formulas, where f is the frequency in mhz, c out is the capacitance in f, l is the inductance in h, and i load is the output current in amps. v ivv cvf v p p boost load out in out out ppb ? ? = ? , , () u uck out in out out in lc f vv v v = ? 1 8 2 () since the output current is discontinuous in boost mode, the ripple in this mode will generally be much larger than the magnitude of the ripple in buck mode. in addition to controlling the ripple magnitude, the value of the output capacitor also affects the location of the resonant frequency in the open loop converter transfer function. if the output capacitor is too small, the bandwidth of the converter will extend high enough to degrade the phase margin. to prevent this from happening, it is recommended that a minimum value of 22f be used for the buck-boost output capacitor. buck-boost input capacitor selection the supply current to the buck-boost converter is provided by the pv in1 and pv in3 pins. it is recommended that a low esr ceramic capacitor with a value of at least 22f be located as close to this pin as possible. inductor style and core material different inductor core materials and styles have an impact on the size and price of an inductor at any given peak current rating. toroid or shielded pot cores in ferrite or permalloy materials are small and reduce emissions, but generally cost more than powdered iron core induc- tors with similar electrical characteristics. the choice of inductor style depends upon the price, sizing, and emi requirements of a particular application. however, the inductor must also have low esr to provide acceptable ef? ciency and must be able to carry the highest current required by the application without saturating. table 3 provides a list of several manufacturers of inductors that are well suited to ltc3520 applications. table 3. inductor vendor information manufacturer phone web site coilcraft 847-639-6400 www.coilcraft.com murata 814-238-0490 www.murata.com sumida 847-956-0702 www.sumida.com tdk 847-803-6296 www.component.tdk.com toko 847-699-7864 www.tokoam.com applications information
ltc3520 18 3520fa capacitor vendor information both the input and output capacitors used with the ltc3520 must be low esr and designed to handle the large ac cur- rents generated by switching converters. the vendors in table 4 provide capacitors that are well suited to ltc3520 application circuits. table 4. capacitor vendor information manufacturer web site part number taiyo yuden www.t-yuden.com jmk212bj226mg-t 22f, 6.3v tdk www.component.tdk.com c3216x5roj106kb 10f, 6.3v sanyo www.secc.co.jp 6apd10m 10f, 6.3v murata www.murata.com grm21br60j226me39 22f, 6.3v closing the buck-boost feedback loop the ltc3520 buck-boost converter employs voltage mode pwm control. the control to output gain varies with opera- tional region (buck, boost, or buck-boost), but is usually no greater than 24db. the output ? lter exhibits a double pole response as given by the following equations: f lc hz buck mode f filter pole out filter po _ _ () = 1 2 l le out out vlc hz boost mode = 1 2 () where l is the inductance in henries and c out is the output capacitance in farads. the output ? lter zero is given by: f rc hz filter zero esr out _ = 1 2 where r esr is the equivalent series resistance of the output capacitor. a challenging aspect of the loop dynamics in boost mode is the presence of a right half plane zero at the frequency given by: f v ilv hz rhpz in out out = 2 2 the loop gain is typically rolled off to below unity gain before the worst case right half plane zero frequency. a simple type i compensation network as shown in figure 6 can be utilized to stabilize the buck-boost converter. however, this will yield a relatively low band- width and slow transient response. to ensure suf? cient phase margin using type i compensation, the loop must be crossed over a decade before the lc double pole fre- quency. the unity-gain frequency of the error ampli? er with type i compensation is given by: f rc hz ug p = 1 21 1 figure 6. type i compensation network applications information 0.782v r1 r2 3520 f06 fb1 18 v c1 c p1 v out 15 C +
ltc3520 19 3520fa most applications require a faster transient response than can be attained using type i compensation in order to reduce the size of the output capacitor. to achieve a higher loop bandwidth, type iii compensation is required, providing two zeros to compensate for the double pole response of the output ? lter. referring to figure 7, the location of the compensation poles and zeros are given as follows: f rc hz hz f rc pole p zero zp 1 1 1 1 1 2 32000 1 0 1 2 ?? = () h hz f rc hz f rc hz zero z pole zp 2 1 2 2 1 21 1 2 = = where all resistances are in ohms and all capacitances are in farads. pcb layout considerations the ltc3520 switches large currents at high frequencies. special care should be given to the pcb layout to ensure stable, noise-free operation. figure 8 depicts the recom- mended pcb layout to be utilized for the ltc3520. a few key guidelines follow: 1. all circulating current paths should be kept as short as possible. this can be accomplished by keeping the routes to all bold components in figure 8 as short and as wide as possible. capacitor ground connec- tions should via down to the ground plane by the shortest route possible. the bypass capacitors on pv in1 , pv in2 , and pv in3 should be placed as close to the ic as possible and should have the shortest possible paths to ground. 2. the small signal ground pad (sgnd) should have a single-point connection to the power ground. a con- venient way to achieve this is to short the pin directly to the exposed pad as shown in figure 8. 3. the components shown in bold and their connections should all be placed over a complete ground plane to reduce the cross-sectional area of circulating current paths. 4. to prevent large circulating currents from disrupting the output voltage sensing, the ground for each resistor divider should be returned directly to the small signal ground pin (sgnd). 5. use of vias in the die attach pad will enhance the ther- mal environment of the converter especially if the vias extend to a ground plane region on the exposed bottom surface of the pcb. figure 7. type iii compensation network applications information 0.782v r1 r2 3520 f07 fb1 18 v c1 c z1 v out 15 c p2 C + c p1 r z
ltc3520 20 3520fa applications information figure 8. ltc3520 recommended pcb layout 3520 f08 buck v out r burst kelvin directly to pin 16 kelvin directly to pin 16 c ss2 c ss1 buck-boost v out r t uninterrupted ground plane must exist under all components shown in bold and under traces connecting to those components. via to ground plane sv in a out a in r t pwm1 sd1 sgnd ss1 v c1 fb2 ss2 fb1 sgnd pv in3 pv in1 sw1a pgnd1 sv1b v out1 sd2 sd3 pv in2 sw2 pgnd2 pwm2 24 23 22 21 20 19 7 8 9 10 11 12 6 5 4 3 2 1 13 14 15 16 17 18
ltc3520 21 3520fa typical applications sequenced buck converter start-up 3.3v at 500ma and 1.8v at 600ma outputs 3520 ta02a sw1a sw1b v out1 a out a in v c1 fb1 ss1 sv in pv in3 pv in2 pv in1 pgnd2 sgnd pgnd1 sw2 fb2 ss2 r t pwm1 pwm2 sd3 sd1 sd2 c3 22f 1m 442k 309k 15k 470pf 10k 56pf ltc3520 v out 3.3v 500ma 1a for v in 3v v out 1.8v 600ma v in 2.2v to 4.2v c1, c2, c3: taiyo yuden ceramic jmk212bj226mg-t l1: tdk rlf7030t-4r7m3r4 4.7h l2: tdk rlf7030t-3r3m4r 3.3h the buck converter is enabled when the buck-boost output voltage reaches 3.0v. c2 22f 470pf 0.022 f 0.022 f 54.9k 255k 200k 301k 499k c1 22f li-ion l2 3.3h l1 4.7h 158k 27pf pwm burst on off typical waveforms during power-up sd1 , sd3 5v/div 1ms/div buck v out 1v/div buck-boost v out 2v/div a out 5v/div 3520 ta02b
ltc3520 22 3520fa typical applications dual 3.3v at 500ma and 1.2v at 600ma supplies with power good output 3520 ta03a sw1a sw1b v out1 a out a in v c1 fb1 ss1 sv in pv in3 pv in2 pv in1 pgnd2 sgnd pgnd1 sw2 fb2 ss2 r t pwm1 pwm2 sd3 sd2 sd1 c3 22f 1m 442k 309k 15k 470pf 10k 56pf ltc3520 v out 3.3v 500ma 1a for v in 3v v out 1.2v 600ma v in 2.2v to 4.2v c1, c2, c3: taiyo yuden ceramic jmk212bj226mg-t l1: tdk rlf7030t-4r7m3r4 4.7h l2: tdk rlf7030t-3r3m4r 3.3h 27pf c2 22f 0.022 f 0.022 f 54.9k 100k 191k 301k c1 22f li-ion l2 3.3h l1 4.7h 158k buck-boost pgood output 150pf pwm burst on off typical waveforms during power-up sd1 , sd2 , sd3 5v/div 1ms/div buck v out 0.5v/div buck-boost v out 1.5v/div a out (buck-boost pgood) 5v/div 3520 ta03b
ltc3520 23 3520fa information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. package description uf package 24-lead plastic qfn (4mm 4mm) (reference ltc dwg # 05-08-1697) 4.00 0.10 (4 sides) note: 1. drawing proposed to be made a jedec package outline mo-220 variation (wggd-x)?to be approved 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side, if present 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package pin 1 top mark (note 6) 0.40 0.10 24 23 1 2 bottom view?exposed pad 2.45 0.10 (4-sides) 0.75 0.05 r = 0.115 typ 0.25 0.05 0.50 bsc 0.200 ref 0.00 ? 0.05 (uf24) qfn 0105 recommended solder pad pitch and dimensions 0.70 0.05 0.25 0.05 0.50 bsc 2.45 0.05 (4 sides) 3.10 0.05 4.50 0.05 package outline pin 1 notch r = 0.20 typ or 0.35 45 chamfer
ltc3520 24 3520fa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2007 lt 0609 rev a ? printed in usa related parts typical application part number description comments ltc3410/ ltc3410b 300ma (i out ), 2.25mhz synchronous buck dc/dc converter v in : 2.5v to 5.5v, v out(range) : 0.8v to v in , i q = 26a, i sd < 1a, sc70 packages ltc3440 600ma (i out ), 2mhz synchronous buck- boost dc/dc converter v in : 2.5v to 5.5v, v out(range) : 2.5v to 5.5v, i q = 25a, i sd < 1a, ms and dfn packages ltc3441 1.2a (i out ), 2mhz synchronous buck- boost dc/dc converter v in : 2.4v to 5.5v, v out(range) : 2.4v to 5.25v, i q = 25a, i sd < 1a, dfn package ltc3442 1.2a (i out ), 2mhz synchronous buck- boost dc/dc converter v in : 2.4v to 5.5v, v out(range) : 2.4v to 5.25v, i q = 35a, i sd < 1a, dfn package ltc3443 600khz, 1.2a, synchronous buck-boost dc/dc converter 95% ef? ciency, v in : 2.4v to 5.5v, v out(range) : 2.4v to 5.25v, i q = 25a, i sd < 1a, dfn package ltc3444 1.5mhz, 400ma, synchronous buck-boost dc/dc converter v in : 2.75v to 5.5v, v out(range) : 0.5v to 5v, i sd < 1a, dfn package ltc3455 dual dc/dc converter with usb power manager and li-ion battery charger 96% ef? ciency, seamless transition between inputs, i q = 110a, i sd < 2a, qfn package ltc3456 two cell multi-output dc/dc converter with usb power manager 92% ef? ciency, seamless transition between inputs, i q = 180a, i sd < 1a, qfn package ltc3522 400ma (i out ) synchronous buck-boost and 200ma buck dc/dc converters v in : 2.4v to 5.5v, buck-boost v out(range) : 2.2v to 5.25v, buck v out(range) : 0.6v to v in , i q = 25a, i sd < 1a, qfn package ltc3530 600ma (i out ), 2mhz synchronous buck- boost dc/dc converter v in : 1.8v to 5.5v, v out(range) : 1.8v to 5.5v, i q = 40a, i sd < 1a, dfn and msop packages ltc3532 500ma (i out ), 2mhz synchronous buck- boost dc/dc converter v in : 2.4v to 5.5v, v out(range) : 2.4v to 5.25v, i q = 35a, i sd < 1a, dfn and msop packages ltc3548 400ma/800ma, 2.25mhz dual synchronous step-down dc/dc converter 95% ef? ciency, v in : 2.5v to 5.5v, v out(min) = 0.6v, i q = 40a, i sd < 1a, dfn and msop packages 3520 ta04 sw1a sw1b v out1 a out a in v c1 fb1 ss1 sv in pv in3 pv in2 pv in1 pgnd2 sgnd pgnd1 sw2 fb2 ss2 r t pwm1 pwm2 sd3 sd2 sd1 c3 22f 1m 750k 309k 15k 470pf 10k 56pf ltc3520 v out 3.3v 500ma 1a for v in 3v v out 1.8v 600ma v in 2.2v to 4.2v v in low battery output (active low) threshold = 2.3v c1, c2, c3: taiyo yuden ceramic jmk212bj226mg-t l1: tdk rlf7030t-4r7m3r4 4.7h l2: tdk rlf7030t-3r3m4r 3.3h c2 22f 3.3nf 3.3nf 54.9k 255k 200k 301k c1 22f li-ion l2 3.3h l1 4.7h 392k bat_low 27pf pwm burst on off li-ion to 3.3v at 500ma and 1.8v at 600ma with low battery detection

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